Official Event Report & Evaluation Dossier (23 Pages)
Comprehensive documentation covering student participation, rubrics, full winner list, remarks, survey analytics, and event photography.
Executive Summary & Overview
Department of EXTC • Mini Project Exhibition and CompetitionBridging Theoretical Foundations with Hands-On Engineering
SANKALPANA 2026 was a Mini Project Exhibition and Competition successfully organized by the Department of Electronics and Telecommunication Engineering (EXTC) at Don Bosco Institute of Technology (DBIT), Kurla, Mumbai. Held on 14 May 2026, the event brought together 119 Second Year (SE) and Third Year (TE) students who designed, built, and demonstrated functional mini-projects across embedded systems, IoT, automation, digital electronics, and communication systems.
The initiative was organized under the banner of IETE-DBIT-ISF and coordinated by Mr. Ankur Ganorkar. The event served as a vibrant experiential platform bridging the gap between rigorous theoretical classroom learning and practical field engineering, while equipping future engineers with essential communication, problem-solving, and collaborative skills.
Major Technological Tracks & Themes:
Event Metadata
- Event: Sankalpana 2026
- Date: 14th May 2026
- Venue: EXTC LAB 02, 03, 04, 07 & Seminar Hall
- Patron: Fr. Nelson Carvalho
- Chief Guest: Dr. Amiya Tripathi
- HOD EXTC: Dr. Madhavi Pednekar
- Faculty Coordinator: Mr. Ankur Ganorkar
- Organizing Body: IETE-DBIT-ISF
- Target Audience: SE & TE EXTC Students
INNOVATE
Showcase creative ideas, critical thinking, and smart engineering solutions.
BUILD
Turn concepts and circuit schematics into physical, functional working prototypes.
CONNECT
Collaborate, exchange technical insights, and grow alongside faculty and peers.
IMPACT
Deploy technology that creates tangible societal benefit and solves real-world challenges.
Event Objectives
- Provide a dedicated platform for SE and TE students to showcase innovative mini projects and technical concepts.
- Encourage students to translate theoretical principles into practical engineering applications using microcontrollers, sensors, and communication modules.
- Promote creativity, collaborative teamwork, and analytical problem-solving through project-based learning.
- Give students rigorous exposure to technical viva, project defense, and formal evaluation by expert faculty judges.
- Motivate exploration of modern toolchains such as ESP32, Arduino, FPGA, digital ICs, and sensor telemetry.
Key Outcomes
- Participants successfully demonstrated working hardware prototypes across embedded systems, IoT, automation, and digital logic.
- Students solidified their practical understanding of PCB/circuit design, sensor interfacing, and real-time firmware development.
- Participants developed sharp technical presentation skills and confidence when articulating engineering decisions to evaluators.
- Enhanced inter-team collaboration, innovation spirit, and readiness for advanced final-year capstone projects.
Sankalpana 2026 Winners
Congratulations to the outstanding winning teams evaluated across SE and TE project tracks (14th May 2026).
Traffic Signal Management System
Intelligent traffic signal automation system utilizing sensor arrays and microcontrollers to dynamically optimize vehicle flow and reduce urban congestion.
Smart Irrigation
Automated soil moisture sensing and microcontroller-actuated irrigation pipeline designed to preserve water and enhance agricultural productivity.
Medicine Reminder & Monitoring Device for Elderly
Assistive healthcare reminder device integrating real-time clock telemetry, LCD scheduling prompts, and alert buzzers to ensure medication adherence.
PWM Generator for Motor Speed Control
High-precision FPGA digital logic synthesized implementation of a Pulse Width Modulation controller delivering regulated DC motor speed actuation.
8 Bit Barrel Shifter
Optimized digital combinational logic circuit for multi-bit data shifting within a single clock cycle, vital for high-speed ALU arithmetic processors.
UART Communication
Robust asynchronous serial communication protocol implementation on FPGA hardware architecture supporting baud rate generation and parity checks.
Honoring Student Innovators & Mentors
Winners alongside Father Nelson Carvalho (Patron), Dr. Madhavi Pednekar (HOD EXTC), evaluating judges, and faculty coordinators during the certificates and awards distribution ceremony.
Judges Panels & Evaluation Rubrics
Rigorous and standardized double-blind judging ecosystemSE Project Judges Panel (Second Year)
| Panel | Venue | Group Scope | Judges Assigned |
|---|---|---|---|
| Panel 1 | EXTC LAB 2 & 3 | Groups 1 to 9 |
Ext: Dr. Royal D’Souza
Int: Ms. Freda Carvalho (Gr. 1–6)
|
| Panel 2 | EXTC LAB 2, 3 & 7 | Groups 10 to 18 |
Ext: Dr. Revathy Sundararajan
Int: Dr. Sonal Patil (Gr. 7–12)
|
| Panel 3 | EXTC LAB 2, 3 & 7 | Groups 13 to 18 |
Int: Dr. Shilpa Gaikwad (Gr. 13–18)
|
TE Project Judges Panel (FPGA SEM-VI)
| Panel | Venue | Group Scope | Judges Assigned |
|---|---|---|---|
| Panel 1 | EXTC LAB 4/6/7 | Groups 1 to 10 |
Ext: Mr. Yogesh Gholap
Int: Dr. Aparna Telgote
|
| Panel 2 | EXTC LAB 4/6/7 | Groups 11 to 19 |
Ext: Dr. Prasad Padalkar
Int: Prof. Ankur Ganorkar
|
Standardized Evaluation Criteria (Total: 50 Marks)
SE Evaluation Rubric (10 Marks Each)
- 1. Social Impact & Community Need 10 Marks
- 2. Actionable Metrics & Direct Problem-Solving 10 Marks
- 3. Clarity of Communication & Data Presentation 10 Marks
- 4. Poster Design & Visual Architecture 10 Marks
- 5. Prototype Presentation Complete & Working 10 Marks
TE FPGA Evaluation Rubric (10 Marks Each)
- 1. Problem Identification and Planning 10 Marks
- 2. Methodology, Analysis and System Design 10 Marks
- 3. Implementation, Prototype and Working Live Demo 10 Marks
- 4. SDG Social and Industrial Relevance 10 Marks
- 5. Teamwork, Presentation and Poster Quality 10 Marks
Event Proceedings & Schedule
Executed seamlessly on Thursday, 14 May 20269:30 AM • Formal Inauguration Ceremony
Venue: EXTC CR-2
Welcome address by Dr. Madhavi Pednekar (HOD), formal ribbon-cutting, invocation prayer by Father Nelson Carvalho (Patron), and motivational keynote by Chief Guest Dr. Amiya Tripathi.
10:00 AM – 1:00 PM • Mini Project Exhibition & Viva
Venue: EXTC LAB 02, 03, 04, 07
Live prototype demonstrations, technical evaluations, viva questioning by internal and external panels, and interactive peer reviews across 37+ project teams.
1:00 PM – 2:00 PM • Lunch Break & Jury Deliberation
Venue: EXTC Conference Room
Consolidation of evaluation rubric scores, rubric normalisation across panels, and compilation of final rankings.
2:00 PM – 4:00 PM • Valedictory Function & Awards Ceremony
Venue: DBIT Seminar Hall
Announcement of SE and TE winners, presentation of merit certificates by Fr. Nelson and Chief Guest, evaluator remarks, and closing photo sessions.
Sankalpana 2026 Event Photo Gallery
Live moments from inauguration, project demonstrations, faculty viva, and the awards ceremony.
Event Feedback & Survey Analytics
Quantitative evaluation by 54 survey respondents (96.3% Students, 3.7% Faculty)
Participant & Attendee Feedback:
“Good way to integrate tech & practical implementation in students.”
“Overall good platform to showcase technical knowledge.”
“Great experience. Projects were great and it was so fun to see all those working models.”
Leadership Remarks & Institutional Impact
Insights from institutional dignitaries and department leadershipKey Strengths Observed
- Academic: High-quality student innovation at SE and TE levels demonstrating strong technical foundations.
- Integration: Effective hands-on synthesis of embedded microcontrollers, sensors, and FPGA description logic.
- Diversity: Interdisciplinary project spectrum encompassing IoT, automation, medical assistive devices, and signal telemetry.
- Operational: Seamless coordination across registration, labs, jury evaluation, and the valedictory ceremony.
Roadmap & Recommendations
- Short-Term: Conduct structured pre-event mentoring bootcamps and standardize judging rubrics across cohorts.
- Medium-Term: Invite industry evaluators and expand an inter-collegiate dimension with incubator support for high-potential prototypes.
- Long-Term: Institutionalize Sankalpana into the department's Outcome-Based Education (OBE) strategy with seed funding grants.
Institutional Impact Summary
| Impact Area | Academic & Student Outcome |
|---|---|
| Innovation Platform | Successfully established a competitive departmental mini-project platform for SE & TE cohorts. |
| Learning Approach | Encouraged practical, experiential, and hands-on engineering education bridging theory to practice. |
| Student Confidence | Strengthened technical viva, public speaking, and prototype demonstration capabilities before expert panels. |
| Peer Collaboration | Fostered inter-team synergy, collective problem solving, and peer learning across cohorts. |
| Institutional Quality | Reinforced DBIT EXTC's commitment to cutting-edge technical education, NAAC accreditation, and AICTE standards. |
Sankalpana 2025 Winners
Held on 5th April 2025 at DBIT EXTCSecond Year (SE) Project Winners (2025)
| Rank | Group No. | Project Title | Name Of Students |
|---|---|---|---|
| 1st | Group 1 | Pollution Monitoring System |
Yashvi Jain Saha Anu Dhruv Tarev Vipaak Gaikwad |
|
2nd
Joint 2nd
|
Group 6 | Bad Posture Detection and Alerting System |
Aayush Jangam Sumit Botle Atharva Badhe Gavin Lobo |
| Group 11 | Robotic Vacuum Cleaner |
Atif Siddiuqe Shravan Philse Vinayak Yadav Harsh Rai | |
| 3rd | Group 12 | WiFi Controlled Cart |
Mrunmai Patekar Aryan Puranik Kripa Dewoolkar Saeesh Gidh |
Third Year (TE) Project Winners (2025)
| Rank | Group No. | Project Title | Name Of Students |
|---|---|---|---|
| 1st | Group 11 | Digital Clock |
Samruddhi Kapdnis Harsh Dusane Aditya Shetty Ruchi Tiwari |
| 2nd | Group 5 | SPI Protocol |
Zubia Sarang Kartik Dandelia Aditya Punekar Tanmayee Ahire |
| 3rd | Group 4 | Voting Machine |
Aftab Shaikh Arpita Pawar Samruddhi Patil Roystan Poobalarayan |
Sankalpana 2025 Photo Archive